1. Technical Field
Embodiments of the present invention relate to computer memory management and, more particularly, to techniques for identifying an accessing of memory in a computer device.
2. Background Art
Often, computer platforms provide architectures for fetching data from a data source to a data destination, where operation of the data destination is monitored and/or controlled by management logic. In such architectures, efficient management of the data destination's memory resources may be aided based on access information—e.g. information which describes whether and/or how one or more memory regions of the data destination have been, or have not been, accessed.
For example, determining a least recently used (LRU) page in a set of memory pages of a data destination may aid in reducing a likelihood of writing over data in the data destination which is still needed by some process or hardware. Moreover, memory groups—configurable associations of one or more memory regions—may be efficiently expanded or contracted, in size and/or in number, based on information indicating an extent to which certain member memory regions are being, or have been, accessed.
The increasing data rates of computer platforms have resulted in an increasing load on memory management resources. More particularly, the effectiveness of memory management is increasingly sensitive to the number of clock cycles which circuitry or firmware/software execution requires in generating access information on which the memory management is based. As a result, marginal improvements in the efficiency of memory management are limited by the extent of inherent time delays in current techniques for generating memory access information.